Mega-trends like artificial intelligence and robotics, smart homes and cars, and the Internet of Things are driving a need for new levels of integrated circuit (IC) speed, scale, and reliability.
At the same time, device manufacturers striving to meet new worldwide consumer and business data demands at lower costs face significant challenges in terms of process control, yield, and economics.
As logic devices migrate to smaller line widths, 3D NAND architectures increase layers, and DRAM memory density increases, sensitivity to contamination and defects have a greater impact on device performance.
And given the critical human impact of applications like AI and self-driving cars, flawless device performance has taken on a heightened importance with which the industry traditionally hasn’t had to contend.
To achieve optimum wafer yield and reliability, the microelectronics industry needs to address the increased materials consumption requirements—and critically, the material purity challenges—for these high-performance technologies from chemical manufacture to their point of use.
Controlling contamination begins with the chemicals that come into direct contact with every wafer.
Increasing chemical purity is the first step in enabling process cleanliness and improving device yield.
This is why device manufacturers continue to pressure chemical suppliers to deliver a higher level of...
thumbnail courtesy of chem.info